The present disclosure relates to a solid-state imaging device and the method for manufacturing the solid-state imaging device.
Solid-state imaging devices, such as complementary metal-oxide semiconductor (CMOS) sensors and charge-coupled device (CCD) sensors, mounted in digital still cameras etc. each include a plurality of two-dimensionally arranged photodiodes. Conventionally, each photodiode is configured such that a pn junction is formed in a semiconductor substrate.
In recent years, a pixel size has been decreased with increasing the number of pixels and decreasing the size of a solid-state imaging device. Tendency shows that the area of a photodiode region is decreased. A decrease in area of the photodiode region results in lowered sensor characteristics such as reduction in amount of saturation signal charge per pixel or reduction in sensitivity due to, e.g., a lowered aperture ratio and a lowered light collection efficiency.
With reduction in amount of saturation signal charge and degradation of sensitivity characteristics, it is important to reduce noise. One of causes for noise is crystal defects and metal contamination in, e.g., charge accumulation parts and charge reading parts in a pixel region. Particularly in the case where silicide is formed on gate electrodes and diffusion regions in the pixel region, metal for silicide formation diffuses in, e.g., the charge accumulation parts and the charge reading parts. As a result, such metal appears as noise such as white spot.
In order to resolve such a noise issue, solid-state imaging devices in which no silicide is formed in pixel regions are typically employed (see, e.g., Japanese Unexamined Patent Publication No. 2006-245540).
In recent years, solid-state imaging devices having, in order to enhance a light use efficiency, the structure in which an organic photoelectric conversion layer is stacked on a substrate have been developed (see, e.g., Japanese Unexamined Patent Publication No. 2009-130090).